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200PIN DDR333 Unbuffered SO-DIMM

1GB With 64Mx8 CL2.5

Description

The TS128MSD64V3A is a 128M x 64bits Double Data

Rate SDRAM high-density for DDR333. The

TS128MSD64V3A consists of 16pcs CMOS 64Mx8 bits

Double Data Rate SDRAMs in 60 Ball FBGA packages and

a 2048 bits serial EEPROM on a 200-pin printed circuit

board. The TS128MSD64V3A is a Dual In-Line Memory

Module and is intended for mounting into 200-pin edge

connector sockets.

Synchronous design allows precise cycle control with the

use of system clock. Data I/O transactions are possible on

both edges of DQS. Range of operation frequencies,

programmable latencies allow the same device to be useful

for a variety of high bandwidth, high performance memory

system applications.

Features

• Power supply: VDD= VDDQ: 2.5V ± 0.1V,

• Max clock Freq: 166MHZ.

• Double-data-rate architecture; two data transfers per

clock cycle

• Differential clock inputs (CK and /CK)

• DLL aligns DQ and DQS transitions with CLK transition

• Commands entered on each positive CLK edge

• Auto and Self Refresh.

• Data I/O transactions on both edge of data strobe.

• Serial Presence Detect (SPD) with serial EEPROM

• SSTL-2 compatible inputs and outputs.

• MRS cycle with address key programs.

CAS Latency (Access from column address) : 2.5

Burst Length (2,4,8)

Data Sequence (Sequential & Interleave)

Placement

PCB: 09-1870

Transcend Information Inc.

1 2 3 4 5 6 ... 11 12

Podsumowanie treści

Strona 1

TTTSSS111222888MMMSSSDDD666444VVV333AAA 200PIN DDR333 Unbuffered SO-DIMM 1GB With 64Mx8 CL2.5 Description The TS128MSD64V3A is a 128M x 64bits Double

Strona 2

TTTSSS111222888MMMSSSDDD666444VVV333AAA 200PIN DDR333 Unbuffered SO-DIMM 1GB With 64Mx8 CL2.5 SIMPLIFIED TRUTH TABLE (V=Valid, X=Don’t Care, H=Logic

Strona 3

TTTSSS111222888MMMSSSDDD666444VVV333AAA 200PIN DDR333 Unbuffered SO-DIMM 1GB With 64Mx8 CL2.5 Serial Presence Detect Specification 70 11 DIMM config

Strona 4

TTTSSS111222888MMMSSSDDD666444VVV333AAA 200PIN DDR333 Unbuffered SO-DIMM 1GB With 64Mx8 CL2.5 42 53 DDR SDRAM Minimum Auto-Refresh to Active / Auto R

Strona 5

TTTSSS111222888MMMSSSDDD666444VVV333AAA 200PIN DDR333 Unbuffered SO-DIMM 1GB With 64Mx8 CL2.5 Dimensions DQS0~DQS7 Data strobe input/output Side M

Strona 6 - DC CHARACTERISTICS

TTTSSS111222888MMMSSSDDD666444VVV333AAA 200PIN DDR333 Unbuffered SO-DIMM 1GB With 64Mx8 CL2.5 Pinouts: 74 *CB5 142 DQ4416 VSS 84 *CB7 161 VSS 2

Strona 7

TTTSSS111222888MMMSSSDDD666444VVV333AAA 200PIN DDR333 Unbuffered SO-DIMM 1GB With 64Mx8 CL2.5 Block Diagram SCL SDASCLSDASerial EEPROMA0 A1 A2SA0 S

Strona 8

TTTSSS111222888MMMSSSDDD666444VVV333AAA 200PIN DDR333 Unbuffered SO-DIMM 1GB With 64Mx8 CL2.5 ABSOLUTE MAXIMUM RATINGS Parameter Max Unit Note 1.35

Strona 9

TTTSSS111222888MMMSSSDDD666444VVV333AAA 200PIN DDR333 Unbuffered SO-DIMM 1GB With 64Mx8 CL2.5 DC CHARACTERISTICS (Recommended operating condition unl

Strona 10

TTTSSS111222888MMMSSSDDD666444VVV333AAA 200PIN DDR333 Unbuffered SO-DIMM 1GB With 64Mx8 CL2.5 AC OPERATING CONDITIONS Parameter SymbolV Input Le

Strona 11 - Transcend Information Inc

TTTSSS111222888MMMSSSDDD666444VVV333AAA 200PIN DDR333 Unbuffered SO-DIMM 1GB With 64Mx8 CL2.5 AC Timing Parameters & Specifications (These AC cha

Strona 12

TTTSSS111222888MMMSSSDDD666444VVV333AAA 200PIN DDR333 Unbuffered SO-DIMM 1GB With 64Mx8 CL2.5 DQ & DM hold time to DQS 3 Note: tDH 0.45 ns 1.

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Podsumowanie treści

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