
J
J
J
M
M
M
3
3
3
3
3
3
5
5
5
Q
Q
Q
6
6
6
4
4
4
4
4
4
A
A
A
-
-
-
5
5
5
240PIN DDR2 533 Unbuffered DIMM
256MB With 32Mx16 CL4
Transcend Information Inc.
11
37
Internal write to read command delay(=tWTR)
7.5ns 1E
38
Internal read to precharge command delay(=tRTP)
7.5ns 1E
39
Memory analysis probe characteristics
- 00
40
Reserved
- 00
41
DDR SDRAM Minimum Active to Active/Auto Refresh
Time(tRC)
60ns 3C
42
DDR SDRAM Minimum Auto-Refresh to
Active/Auto-Refresh Command Period (tRFC)
105ns 69
43
DDR SDRAM Maximum Device Cycle Time (tCK max)
8ns 80
44
DDR SDRAM DQS-DQ Skew for DQS and associated
DQ signals (tDQSQ max)
0.3ns 1E
45
DDR SDRAM Read Data Hold Skew Factor (tQHS)
0.4ns 28
46
PLL Relock Time
- 00
47
TCASE.max Delta / ∆ T4R4W Delta
- 00
48
Psi(T-A) DRAM
- 00
49
∆
T0 (DT0)
- 00
50
∆
T2N (DT2N, UDIMM) or ∆ T2Q (DT2Q, RDIMM)
- 00
51
∆
T2P (DT2P)
- 00
52
∆
T3N (DT3N)
- 00
53
∆
T3P.fast (DT3P fast)
- 00
54
∆
T3P.slow (DT3P slow)
- 00
55
∆
T4R (DT4R) / ∆ T4R4W S Sign (DT4R4W)
- 00
56
∆
T5B (DT5B)
- 00
57
∆
T7 (DT7)
- 00
58~61
Superset Information
- 00
62 SPD Data Revision Code REV 1.0 10
63 Checksum for Bytes 0-62 81
64-71 Manufacturers JEDEC ID Transcend 7F, 4F
72 Manufacturing Location T 00
4A 4D 33 33 35 51
36 34 34 41 2D 35
73-90 Manufacturers Part Number
JM335Q644A-5
00 00 00 00 00 00
91-92 Revision Code - -
93-94 Manufacturing Date By Manufacturer Variable
95-98 Assembly Serial Number By Manufacturer Variable
99-127 Manufacturer Specific Data - -
128~255
Open for customer use
Undefined -
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