Transcend TS1GSH72V1H Arkusz Danych Pobierz pdf (Strona 6)

Differential AC and DC Input Levels

Parameter

Symbol

DDR4-1600/1866/2133

Unit

Note

Min

Max

differential input high DC

VIHdiff(DC)

+0.150

NOTE 3

differential input low DC

VILdiff(DC)

NOTE 3

-0.150

differential input high AC

VIHdiff(AC)

2 x (VIH(AC) - VREF)

NOTE 3

differential input low AC

VILdiff(AC)

NOTE 3

2 x (VIL(AC) -VREF)

Note:

 Used to define a differential signal slew-rate.

 For CK_t - CK_c use VIH.CA/VIL.CA(AC) of ADD/CMD and VREFCA;

 These values are not defined; however, the differential signals CK_t - CK_c, need to be within the

respective limits (VIH.CA(DC) max, VIL.CA(DC)min) for single-ended signals as well as the limitations for

overshoot and undershoot.

Single-ended AC & DC output levels

Parameter

Symbol

DDR4-1600/1866/2133

Unit

Note

DC output high measurement level

VOH(DC)

1.1 x VDDQ

DC output mid measurement level

VOM(DC)

0.8 x VDDQ

DC output low measurement level

VOL(DC)

0.5 x VDDQ

AC output high measurement level

VOH(AC)

(0.7 + 0.15) x VDDQ

AC output low measurement level

VOL(AC)

(0.7 - 0.15) x VDDQ

Note:

 The swing of ± 0.15 × VDDQ is based on approximately 50% of the static single-ended output

peak-to-peak swing with a driver impedance of RZQ/7Ω and an effective test load of 50Ω to VTT = VDDQ.

Differential AC & DC output levels

Parameter

Symbol

DDR4-1600/1866/2133

Unit

Note

AC differential output high

measurement level

VOHdiff(AC)

+0.3 x VDDQ

AC differential output low

measurement level

VOLdiff(AC)

-0.3 x VDDQ

Note:

 The swing of ± 0.3 × VDDQ is based on approximately 50% of the static differential output peak-to-peak

swing with a driver impedance of RZQ/7Ω and an effective test load of 50Ω to VTT = VDDQ at each of the

differential outputs.

1 2 3 4 5 6 7 8 9 10 11

Pin Assignments 3

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